PRODUCT DESCRIPTION
The SST89E564RD, SST89V564RD, SST89E554RC, and SST89V554RC are members of the FlashFlex51 family of 8- bit microcontroller products designed and manufactured with the state-of-the-art SuperFlash CMOS semiconductor process technology.
The devices use the 8051 instruction set and are pin-for-pin compatible with standard 8051 microcontroller devices.
The device comes with 72/40 KByte of on-chip flash EEPROM program memory using SST’s patented and proprietary CMOS SuperFlash EEPROM technology with the SST’s field- enhancing, tunneling injector, split-gate memory cells.
The SuperFlash memory is partitioned into 2 independent program memory blocks.
The primary Super- Flash Block 0 occupies 64/32 KByte of internal program memory space and the secondary SuperFlash Block 1 occupies 8 KByte of internal program memory space.
The 8-KByte secondary SuperFlash block can be mapped to the lowest location of the 64/32 KByte address space; it can also be hidden from the program counter and used as an independent EEPROM-like data memory.
The flash memory blocks can be programmed via a standard 87C5x OTP EPROM programmer fitted with a special adapter and firmware for SST’s device.
During the power-on reset, the device can be configured as a slave to an external host for source code storage or as a master to an external host for an in-application programming (IAP) operation.
The device is designed to be programmed in-system and in-application on the printed circuit board for maximum flexibility.
The device is pre-programmed with an example of the bootstrap loader in the memory, demonstrating the initial user program code loading or subsequent user code updating
via the IAP operation.
An example bootstrap loader is available for the user’s reference and convenience only.
SST does not guarantee the functionality or the usefulness of the sample bootstrap loader.
Chip-Erase operations will erase the pre-programmed sample code.
In addition to 72/40 KByte of SuperFlash EEPROM program memory on-chip, the device can address up to 64 KByte of external program memory.
In addition to 1024 x8 bits of on-chip RAM, up to 64 KByte of external RAM can be addressed.
SST’s highly reliable, patented SuperFlash technology and memory cell architecture have a number of important advantages for designing and manufacturing flash EEPROMs.
These advantages translate into significant cost and reliability benefits for our customers.

FEATURES
*8-bit 8051-Compatible Microcontroller (MCU) with Embedded SuperFlash Memory
-Fully Software Compatible
-Development Toolset Compatible
-Pin-For-Pin Package Compatible
*SST89E564RD/SST89E554RC Operation
-0 to 40 MHz at 5V
*SST89V564RD/SST89V554RC Operation
-0 to 33 MHz at 3V
*Total 1 KByte Internal RAM (256 Byte + 768 Byte)
*Dual Block SuperFlash EEPROM
-SST89E564RD/SST89V564RD: 64 KByte primary block + 8 KByte secondary block (128-Byte sector size for both blocks)
-SST89E554RC/SST89V554RC: 32 KByte primary block + 8 KByte secondary block (128-Byte sector size for both blocks)
-Individual Block Security Lock with SoftLock
-Concurrent Operation during In-Application Programming (IAP)
-Memory Overlay for Interrupt Support during IAP
*Support External Address Range up to 64 KByte of Program and Data Memory
*Three High-Current Port 1 pins (16 mA each)
*Three 16-bit Timers/Counters
*Full-Duplex, Enhanced UART
-Framing error detection
-Automatic address recognition
*Eight Interrupt Sources at 4 Priority Levels
*Programmable Watchdog Timer (WDT)
*Programmable Counter Array (PCA)
*Four 8-bit I/O Ports (32 I/O Pins)
*Second DPTR register
*Low EMI Mode (Inhibit ALE)
*SPI Serial Interface
*Standard 12 Clocks per cycle, the device has an
option to double the speed to 6 clocks per cycle.
*TTL- and CMOS-Compatible Logic Levels
*Brown-out Detection
*Low Power Modes
-Power-down Mode with External Interrupt Wake-up
-Idle Mode
*PDIP-40, PLCC-44 and TQFP-44 Packages
*Temperature Ranges:
-Commercial (0°C to +70°C)
-Industrial (-40°C to +85°C)

SST89V564RD
SST89V564RD
 

SST89E564RD - FlashFlex51 MCU

FEATURES
* High current capability
* High surge current capability
* High reliability
* Low reverse current
* Low forward voltage drop
* Ideal for printed circuit board
* Very good heat dissipation
* Pb / RoHS Free

MECHANICAL DATA
* Case : Reliable low cost construction utilizing molded plastic technique
* Epoxy : UL94V-O rate flame retardant
* Terminals : Plated lead solderable per MIL-STD-202, Method 208 guaranteed
* Polarity : Polarity symbols marked on case
* Mounting position : Any
* Weight : 7.7 grams

D5SBA20
D5SBA40
D5SBA60  

D5SBA10 - SILICON BRIDGE RECTIFIERS

General Description
Aeroflex’s ACT8502 is a radiation hardened, multi-chip 48 channel multiplexer MCM (multi-chip
module) with ESD protection for use in space applications.
All channel inputs have electrostatic discharge protection.
The ACT8502 has been specifically designed to meet exposure to radiation environments.
The multiplexer is available in a 96 lead High Temperature Co-Fired Ceramic (HTCC) Quad Flatpack QFP) and is guaranteed operational from -55°C to +125°C.
Available screened in accordance with MIL-PRF-38534, the ACT8502 is ideal for demanding military and space applications.

Features
*Radiation Environment
*Radiation 300K(Si) Total Dose
*No Latch-Up or SEE to 120MeV/cm2/mg
*Full Military Temperature Range
*Low Power Consumption < 90mW
*48 Channels Provided by Six (6) HS-1840RH Multiplexers
*One Address Bus (A0-3) and Three Enable Lines
*All Channel Inputs protected by ±20V Transorbs
*Fast Access Time 1500ns
*±35V Input Over Voltage Protection (Power On or Off)
*Break-Before-Make Switching
*High Analog Input Impedance (Power On or Off)
*Dielectrically Isolated Device Islands
*No Latch-Up
*Packaging – Hermetic Ceramic Quad Flat Pack
*96 Leads, 1.32"Sq x .20"Ht Quad Flat Pack
*Typical Weight 15 grams
*DESC SMD Pending

Organization and Application
The ACT8502 consists of six 16 channel muxes arranged as shown in the Block Diagram.
The ACT8502 design is inherently Radiation Hard due to the HS1840RH Multiplexers as well as
Microsemi Corp.
Transient Suppressors (Reference Microsemi MicroNotes Series 050 - page 14).
48 channels addressable by Bus A0~A3, in Three 16 channel blocks, each block enabled
separately.
Each block connects the addressed channel to two outputs, "Output" and "Current".
This technique enables selecting and reading a remote resistive sensor without the MUX
resistance being part of the measurement.
For grounded sensors, this is done by passing current to the sensor by means of the "Current" pin and reading the resultant voltage (proportional to the sensor resistance) at the "Output" pin.
NOTE: It is recommended that all "NC or "no connect pin", be grounded.
This eliminates or minimizes any ESD or static buildup.

ACT8502-S
ACT8502
ACT8502-7
 

ACT8502-Radiation Hardened & ESD Protected 48-Channel Analog Multiplexer Module

Description
The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness.  

AP9985M-N-CHANNEL ENHANCEMENT MODE POWER MOSFET

General Description
The ADS4616A4A are two-bank Synchronous DRAMs organized as 524,288 words x 16 bits x 2 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications

Features
*Single 3.3V +/- 0.3V power supply
*MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,4,8, & full page)
-Burst Type (sequential & Interleave)
*2 banks operation
*All inputs are sampled at the positive edge of the system clock
*Burst Read single write operation
*Auto & Self refresh
*4096 refresh cycle
*DQM for masking
*Package:50-pins 400 mil TSOP-Type II

ADS4616A4A-5
ADS4616A4A -6
ADS4616A4A -7  

ADS4616A4A-Synchronous DRAM 512K x 16 Bit x 2 Banks