DESCRIPTION
The MC74VHC244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The MC74VHC244 is a noninverting 3–state buffer, and has two active–low output enables.
This device is designed to be used with 3–state memory address drivers, etc.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

Features
* High Speed: tPD = 3.9ns (Typ) at VCC = 5V
* Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C
* High Noise Immunity: VNIH = VNIL = 28% VCC
* Power Down Protection Provided on Inputs
* Balanced Propagation Delays
* Designed for 2V to 5.5V Operating Range
* Low Noise: VOLP = 0.9V (Max)
* Pin and Function Compatible with Other Standard Logic Families
* Latchup Performance Exceeds 300mA
* ESD Performance: HBM > 2000V; Machine Model > 200V
* Chip Complexity: 136 FETs or 34 Equivalent Gates

MC74VHCXXXDW
MC74VHCXXXDT
MC74VHCXXXM  

MC74VHC244 - Octal Bus Buffer

DESCRIPTION
 The MCM20014 is a fully integrated, high performance CMOS image sensor with features such as integrated timing control, and analog signal processing for digital imaging applications.
The part provides designers a complete imaging solution with a monolithic image capture and processing engine thus making it a true “camera on a chip”.
System benefits enable design of smaller, portable, low cost and low power systems.
Thereby making the product suitable for a variety of consumer applications including still/full motion imaging, security/surveillance, and automotive among others.
The imaging pixels are based on active CMOS pixels using pinned photodiodes that are realized using Motorola’s sub-micron ImageMOSTM technology.
The frame rate is completely adjustable from 0 to 30 frames per second without adjusting the system clock from 10Mhz.
Each pixel on the sensor is individually addressable allowing the user to control “Window of Interest” (WOI) panning and zooming, sub-sampling, resolution, exposure, gain, and other image processing features via a two pin I2C interface.
Programmable digital signal processing blocks included in the data path are bad-pixel replacement and noise compensation for image enhancement.
The sensor is run by supplying a single Master Clock.
The sensor output is 8 or 10 digital bits depending on output mode selected.

Features
* VGA resolution, active CMOS image sensor with square pixel unit cells
* 7.8μm pitch pixels with patented pinned photodiode architecture
* Bayer-RGB color filter array with optional micro lenses
* High sensitivity, quantum efficiency, and charge conversion efficiency
* Low fixed pattern noise / Wide dynamic range
* Antiblooming and continuous variable speed shutter
* Single master clock operation
* Digitally programmable via I2C interface
* Integrated on-chip timing/logic circuitry
* CDS sample and hold for suppression of low frequency and correlated reset noise
* 48X programmable variable gain to optimize dynamic range and facilitate white balance and iris adjustment
* 10-bit, pipelined algorithmic RSD ADC
* User selectable digital output formats:
* 8-bit companded data
* 10-bit linear data
* Column offset correction, and Bad Pixel Replacement for noise suppression
* Pixel addressability to support ‘Window of Interest’ windowing, resolution, and subsampling
* 30fps full VGA at 10Mhz Master Clock Rate
* Single 3.3V power supply
* 48 pin CLCC package

MCM20014IBMN
MCM20014IBB

 

MCM20014 - 1/3” Color VGA Digital Image Sensor

The MC34016 is a telephone line interface meant for use in cordless telephone base stations for CT0, CT1, CT2 and DECT. The circuit forms the interface towards the telephone line and performs all speech and line interface functions like dc and ac line termination, 2–4 wire conversion, automatic gain control and hookswitch control. Adjustment of transmission
parameters is accomplished by two 8–bit registers accessible via the integrated serial bus interface and by external components.
• DC Masks for Voltage and Current Regulation
• Supports Passive or Active AC Set Impedance Applications
• Double Wheatstone Bridge Sidetone Architecture
• Symmetrical Inputs and Outputs with Large Signal Swing Capability
• Gain Setting and Mute Function for Tx and Rx Amplifiers
• Very Low Noise Performance
• Serial Bus Interface SPI Compatible
• Operation from 3.0 to 5.5 V

FEATURES
Line Driver Architecture
• Two DC Masks for Voltage Regulation
• Two DC Masks for Current Regulation
• Passive or Active Set Impedance Adjustment
• Double Wheatstone Bridge Architecture
• Automatic Gain Control Function

Transmit Channel
• Symmetrical Inputs Capable of Handling Large Voltage Swing
• Gain Select Option via Serial Bus Interface
• Transmit Mute Function, Programmable via Bus
• Large Voltage Swing Capability at the Telephone Line

Receive Channel
• Double Sidetone Architecture for Optimum Line Matching
• Symmetrical Outputs Capable of Producing High Voltage Swing
• Gain Select Option via Serial Bus Interface
• Receive Mute Function, Programmable via Serial Bus

Serial Bus Interface
• 3–Wire Connection to Microcontroller
• One Programmable Output Meant for Driving a Hookswitch
• Two Programmable Outputs Capable of Driving Low Ohmic Loads
• Two 8–Bit Registers for Parameter Adjustment


MC34016P
MC34016DW

 

MC34016 - CORDLESS UNIVERSAL TELEPHONE INTERFACE

Features
• Low-cost HC05 core
• 16-pin PDIP, 16-pin SOIC package, or 20-pin SSOP
• 928 bytes of user ROM, including eight bytes of user vectors
• 64 bytes of user RAM
• Low-power operation at 1.8 V — VDD minimum (EEPROM read only)
• 128 bits of personality EEPROM (not memory mapped) programmed using CPU software or with on-chip serial programming ROM
• On-chip charge pump for in-circuit programming of the personality EEPROM at 2.7 to 5.5 Vdc
• 8-bit free-running timer
• 4-stage selectable real-time interrupt generator
• 10 bidirectional input/output (I/O) lines including:
– 8-mA sink capability on four I/O pins (PA7–PA4)
– Mask option for software programmable pulldowns on all I/O pins
– Mask option for port interrupts on four I/O pins (PA3–PA0) (keyboard scan feature)
• IRQ interrupt hardware mask, flag bit, and request bit
• Mask option for sensitivity on IRQ interrupt (edge- and level-sensitive or edge-sensitive only)
• On-chip oscillator (mask options for crystal/ceramic resonator oscillator with internal 2-MW resistor and 2-pin or 3-pin resistor capacitor (RC) oscillator)
• Mask option for reduced startup delay time with RC oscillator options
• Mask option for computer operating properly (COP) watchdog system
• Power-saving stop mode and wait mode instructions
• Mask option to convert STOP instruction to halt mode
• Illegal address reset
• Internal steering diode and pullup resistor on RESET pin to VDD
• Internal RESET pin pulldown from COP watchdog and ILADR

Mask Options
The MC68HC05K3 contains these eight mask options:
1. COP watchdog timer (enable or disable)
2. IRQ triggering (edge-sensitive or edge- and level-sensitive)
3. Port A interrupts (enable or disable)
4. Port software programmable pulldowns (enable or disable)
5. STOP instruction (enable or disable)
6. Oscillator type (crystal/ceramic resonator or RC)
7. RC oscillator type (2-pin or 3-pin)
8. RC oscillator startup delay (4064 or 16 f cycles)

Introduction
 The MC68HC05K3 has a 1024-byte memory map. Therefore, it uses only the lower 10 bits of the address bus. In the following discussion, the upper six bits of the address bus can be ignored. Also, by using a mask option, the STOP instruction can be converted from acting as the normal
STOP instruction.
 The stack area also is reduced to 32 bytes due to the limited amount of RAM. Therefore, the stack pointer is reduced to only five bits, only decrements down to $00E0, and then wraps around to $00FF. All other instructions and registers behave as described in M6805 HMOS/M146805 CMOS Family User’s Manual,Motorola document order number M6805UM/AD3.

 

MC68HC05K3 - HCMOS Microcontroller Unit

 The MJE/MJF13007 is designed for high–voltage, high–speed power switching inductive circuits where fall time is critical. It is particularly suited for 115 and 220 V switchmode applications such as Switching Regulators, Inverters, Motor Controls, Solenoid/Relay drivers and Deflection circuits.

* VCEO(sus) 400 V
* Reverse Bias SOA with Inductive Loads @ TC = 100°C
* 700 V Blocking Capability
* SOA and Switching Applications Information
* Two Package Choices: Standard TO–220 or Isolated TO–220
* MJF13007 is UL Recognized to 3500 VRMS, File #E69369

MJF13007
 

MJE13007 - NPN Bipolar Power Transistor For Switching Power Supply Applications