Product Overview
 The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus.
Individually-erasable memory blocks are optimally sized for code and data storage.
Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map.
The rest of the memory array is grouped into 32 Kword main blocks.
The device supports read-array mode operations at various I/O voltages (1.8 V and 3 V) and erase and program operations at 3 V or 12 V VPP.
With the 3 V I/O option, VCC and VPP can be tied together for a simple, ultra-low-power design.
In addition to I/O voltage flexibility, the dedicated VPP input provides complete data protection when VPP ≤ VPPLK.
The device features a 128-bit protection register enabling security techniques and data protection schemes through a combination of factory-programmed and user-programmable OTP data registers.
Zero-latency locking/unlocking on any memory block provides instant and complete protection for critical system code and data.
Additional block lock-down capability provides hardware protection where software commands alone cannot change the block’s protection status.
A command User Interface(CUI) serves as the interface between the system processor and internal operation of the device.
A valid command sequence issued to the CUI initiates device automation.
An internal Write State Machine (WSM) automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit configuration operations.
The device offers three low-power saving features: Automatic Power Savings (APS), standby
mode, and deep power-down mode.
The device automatically enters APS mode following read cycle completion.
Standby mode begins when the system deselects the flash memory by deasserting CE#.
The deep power-down mode begins when RP# is asserted, which deselects the memory and places the outputs in a high-impedance state, producing ultra-low power savings.
Combined, these three power-savings features significantly enhanced power consumption

Product Features
* Flexible SmartVoltage Technology
- 2.7 V – 3.6 V Read/Program/Erase
- 12 V for Fast Production Programming
* 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
- Reduces Overall System Power
* High Performance
- 2.7 V– 3.6 V: 70 ns Max Access Time
* Optimized Architecture for Code Plus Data Storage
- Eight 4 Kword Blocks, Top or Bottom Parameter Boot
- Up to One Hundred-Twenty-Seven 32 Kword Blocks
- Fast Program Suspend Capability
- Fast Erase Suspend Capability
* Flexible Block Locking
- Lock/Unlock Any Block
- Full Protection on Power-Up
- WP# Pin for Hardware Block Protection
* Low Power Consumption
- 9 mA Typical Read
- 7 A Typical Standby with Automatic Power Savings Feature (APS)
* Extended Temperature Operation
- 40 °C to +85 °C
* 128-bit Protection Register
- 64 bit Unique Device Identifier
- 64 bit User Programmable OTP Cells
* Extended Cycling Capability
- Minimum 100,000 Block Erase Cycles
* Software
- Intel® Flash Data Integrator (FDI)
- Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
- Intel Basic Command Set
- Common Flash Interface (CFI)
* Standard Surface Mount Packaging
- 48-Ball μBGA*/VFBGA
- 64-Ball Easy BGA Packages
- 48-Lead TSOP Package
* ETOX™VIII (0.13 μm) Flash Technology
-16, 32 Mbit
* ETOX™VII (0.18 μm) Flash Technology
- 16, 32, 64 Mbit
* ETOX™VI (0.25 μm) Flash Technology
- 8, 16 and 32 Mbit


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