Description
Designed specifically to address embedded applications, the PowerPC 405GP (PPC405GP)
provides a high-performance, low-power solution that interfaces to a wide range of peripherals by incorporating on-chip power management features and lower power dissipation requirements.
This chip contains a high-performance RISC processor core, SDRAM controller, PCI bus interface, Ethernet interface, control for external ROM and peripherals, DMA with scatter-gather support, serial ports, IIC interface, and general purpose I/O.
Technology: CMOS SA-12E, 0.25 μm (0.18 μm Leff)
Package: 456-ball (35mm or 27mm), or 413-ball (25mm) enhanced plastic ball grid array (E-PBGA)
Power (typical): TBDW at 133MHz, 1.5W at 200MHz, 2W at 266MHz

Features
* PowerPC® 405 32-bit RISC processor core operating up to 266MHz
* Synchronous DRAM (SDRAM) interface operating up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications
* 4KB on-chip memory (OCM)
* External peripheral bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and external peripherals
- Up to eight devices
- External Mastering supported
* DMA support for external peripherals, internal UART and memory
- Scatter-gather chaining supported
- Four channels
* PCI Revision 2.2 compliant interface (32-bit, up to 66MHz)
- Synchronous or asynchronous PCI Bus interface
- Internal or external PCI Bus Arbiter
* Ethernet 10/100Mbps (full-duplex) support with media independent interface (MII)
* Programmable interrupt controller supports seven external and 19 internal edge triggered or levelsensitive interrupts
* Programmable timers
* Two serial ports (16550 compatible UART)
* One IIC interface
* General purpose I/O (GPIO) available
* Supports JTAG for board level testing
* Internal processor local Bus (PLB) runs at SDRAM interface frequency
* Supports PowerPC processor boot from PCI memory  

405GP - Power PC 405GP Embedded Processor