General Description
The VDS7608A4A are four-bank Synchronous DRAMs organized as 4,194,304 words x 8 bits x 4 banks.
Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications

*JEDEC standard LVTTL 3.3V power supply
*MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,3,8,& full page)
-Burst Type (sequential & Interleave)
*4 banks operation
*All inputs are sampled at the positive edge of the system clock
*Burst Read single write operation
*Auto & Self refresh
*4096 refresh cycle
*DQM for masking
*Package:54-pins 400 mil TSOP-Type II

VDS7608A4A-5, VDS7608A4A-55, VDS7608A4A-6, VDS7608A4A-7, VDS7608A4A-7.5

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